The GENSTORM project is aimed at provide a powerful plateform for sequence comparison and pattern matching. This project will result in the GENSTORM machine.
In the next paragraph, you will find information about the main components of the machine. In this server, you can also find a tutorial about sequence comparison.
The architecture of GENSTORM is composed of one or several computing card(s), a disk controller specialised for sequence storage, and a host machine. All the components are glued together with a VME bus.
The calculation cards form a linear network of elementary processing units implemented in FPGA. Each card has the following architecture :
A card is composed by 8 computing FPGAs and 1 control FPGA, several blocks of global memory used during transfer with the host computer. Each computing FPGA has its own local memory.
A VME controller is implemented with an Actel A1225. This controller is also used to program the FPGAs
The disk controler has the following architecture :
The card can control two independent SCSI buses which are linked via double buffering and a interface FPGA to the calculation cards. The control of the card is carried on by a 32 bit microprocessor. The card communicate with the host computer with a VME bus.
For further information or comments, please contact me :
Emeka MOSANYA
| E-Mail Address: | Emeka.Mosanya@di.epfl.ch |
| Mailing Address: | Ecole Polytechnique Fédérale de Lausanne |
| Laboratoire de Systèmes Logiques | |
| INN Ecublens | |
| 1015 Lausanne, Switzerland | |
| Phone Number: | +41-21-693 6620 |
| Fax Number: | +41-21-693 3705 |
For any problems with this server, contact the administrator at www_adm@lslsun.pfl.ch .
The last revision has been made the 20th of May 1997.
Copyright © 1997 Emeka MOSANYA.